# Copyright (c) 2007 The Regents of The University of Michigan
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#
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# neither the name of the copyright holders nor the names of its
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from m5.params import *

from m5.objects.BaseCPU import BaseCPU
from m5.SimObject import SimObject


class CheckerCPU(BaseCPU):
    type = "CheckerCPU"
    abstract = True
    cxx_header = "cpu/checker/cpu.hh"
    cxx_class = "gem5::CheckerCPU"

    exitOnError = Param.Bool(False, "Exit on an error")
    updateOnError = Param.Bool(
        False, "Update the checker with the main CPU's state on an error"
    )
    warnOnlyOnLoadError = Param.Bool(
        True,
        "If a load result is incorrect, only print a warning and do not exit",
    )

    def generateDeviceTree(self, state):
        # The CheckerCPU is not a real CPU and shouldn't generate a DTB
        # node. This is why we are skipping the BaseCPU implementation
        # and we are calling the base SimObject one.
        return SimObject.generateDeviceTree(self, state)
